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Expedition PCB - Pinnacle - Version 2009.0.369.456
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Job Directory:        D:\Job\SolidRun\DOV-E-VM\PCB\

Design Status Report: D:\Job\SolidRun\DOV-E-VM\PCB\LogFiles\DesignStatus_05.txt

Tue Aug 18 19:29:20 2015

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DESIGN STATUS
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Board Size Extents  ............ 3.937 X 2.874 (in)
Route Border Extents  .......... 3.898 X 2.835 (in)
Actual Board Area  ............. 11.315 (in)
Actual Route Area  ............. 11.048 (in)

Placement Areas: Name            Available         Required          Required/Available
                 Entire Board    22.63 Sq. (in)    7.573 Sq. (in)    33.46 %

Pins  .......................... 1170
Pins per Route Area  ........... 105.897 Pins/Sq. (in)

Layers  ........................ 4
    Layer 1 is a signal layer
        Trace Widths  .......... 4, 5, 6, 8, 9, 10, 12, 15, 20, 25, 40
    Layer 2 is a Positive Plane Layer with nets
        GND
        GNDC
        AGND
        Trace Widths  .......... 20
    Layer 3 is a Positive Plane Layer with nets
        GND
        GNDC
        N17615225
        V_5V0
        Trace Widths  .......... 4, 5, 20, 30, 60
    Layer 4 is a signal layer
        Trace Widths  .......... 4, 6, 8, 9, 10, 20, 40

Nets  .......................... 291
Connections  ................... 721
Open Connections  .............. 0
Differential Pairs  ............ 30
Differential Pair Names:   CLK1_N   CLK1_P
                           CSI_CLK0M   CSI_CLK0P
                           CSI_D0M   CSI_D0P
                           CSI_D1M   CSI_D1P
                           CSI_D2M   CSI_D2P
                           CSI_D3M   CSI_D3P
                           DSI_CLK0M   DSI_CLK0P
                           DSI_D0M   DSI_D0P
                           DSI_D1M   DSI_D1P
                           HDMI_CLKM   HDMI_CLKP
                           HDMI_D0M   HDMI_D0P
                           HDMI_D1M   HDMI_D1P
                           HDMI_D2M   HDMI_D2P
                           LVDS0_CLK_N   LVDS0_CLK_P
                           LVDS0_TX0_N   LVDS0_TX0_P
                           LVDS0_TX1_N   LVDS0_TX1_P
                           LVDS0_TX2_N   LVDS0_TX2_P
                           LVDS0_TX3_N   LVDS0_TX3_P
                           MDI_TRXN0   MDI_TRXP0
                           MDI_TRXN1   MDI_TRXP1
                           MDI_TRXN2   MDI_TRXP2
                           MDI_TRXN3   MDI_TRXP3
                           PCIE_CREFCLKM   PCIE_CREFCLKP
                           PCIE_CTXM   PCIE_CTXP
                           PCIE_RXM   PCIE_RXP
                           PCIE_TXM   PCIE_TXP
                           SATA_RXN   SATA_RXP
                           SATA_TXN   SATA_TXP
                           USB_HOST_DN   USB_HOST_DP
                           USB_OTG_DN   USB_OTG_DP
                           
Percent Routed  ................ 100.00 %

Netline Length  ................ 0 (in)
Netline Manhattan Length  ...... 0 (in)
Total Trace Length  ............ 239.329 (in)

Trace Widths Used (th)  ........ 4, 5, 6, 8, 9, 10, 12, 15, 20, 25, 30, 40, 60
Vias  .......................... 725
Via Span  Name                   Quantity
   1-4    VIA24_hole12_sm bot    10
          022VIA_8_SM            29
          022VIA_10              347
          018VIA8                339

Teardrops....................... 0
    Pad Teardrops............... 0
    Trace Teardrops............. 0
    Custom Teardrops............ 0
Breakouts....................... 0

Virtual Pins.................... 0
Guide Pins ..................... 0

Parts Placed  .................. 234
    Parts Mounted on Top  ...... 162
        SMD  ................... 142
        Through  ............... 20
        Test Points  ........... 0
        Mechanical  ............ 0
    Parts Mounted on Bottom  ... 72
        SMD  ................... 71
        Through  ............... 1
        Test Points  ........... 0
        Mechanical  ............ 0
    Embedded Components ........ 0
        Capacitors ............. 0
        Resistors .............. 0
    RF Shapes .................. 0

    Edge Connector Parts  ...... 0

Parts not Placed  .............. 0

Nested Cells  .................. 0

Jumpers  ....................... 0

Through Holes  ................. 844
    Holes per Board Area  ...... 74.591 Holes/Sq. (in)
Mounting Holes  ................ 20

Wirebonds
    Bondpads ................... 0
    Bond Wires ................. 0