
                          CES Constraint Load Error Log
                          -----------------------------

                        10:10 AM Sunday, October 26, 2014
                Job Name: D:\Job\SolidRun\New Job\PCB\New Job.pcb




ERROR - The following net(s) exist in the Layout design, but were not found in CES:

	GND
	GNDC
	V_DCJACK_IN
	V_DCJACK_IN_NEG
	CCM_CLKO1
	CLK1_N
	CLK1_P
	CSI_CLK0M
	CSI_CLK0P
	CSI_D0M
	CSI_D0P
	CSI_D1M
	CSI_D1P
	CSI_D2M
	CSI_D2P
	CSI_D3M
	CSI_D3P
	DISP1_DATA00
	DISP1_DATA01
	DISP1_DATA02
	DISP1_DATA03
	DISP1_DATA04
	DISP1_DATA05
	DISP1_DATA06
	DSI_CLK0M
	DSI_CLK0P
	DSI_D0M
	DSI_D0P
	DSI_D1M
	DSI_D1P
	ECSPI2_MISO
	ECSPI2_MOSI
	ECSPI2_SCLK
	ECSPI2_SS0
	ECSPI2_SS1
	ETH_TCT
	HDMI_CLKM
	HDMI_CLKP
	HDMI_D0M
	HDMI_D0P
	HDMI_D1M
	HDMI_D1P
	HDMI_D2M
	HDMI_D2P
	HDMI_HPD
	HDMI_TX_DDC_SCL
	HDMI_TX_DDC_SDA
	LED_ACT
	LED_10_100_LED_1000
	LVDS0_CLK_N
	LVDS0_CLK_P
	LVDS0_TX0_N
	LVDS0_TX0_P
	LVDS0_TX1_N
	LVDS0_TX1_P
	LVDS0_TX2_N
	LVDS0_TX2_P
	MDI_TRXN0
	MDI_TRXN1
	MDI_TRXN2
	MDI_TRXN3
	MDI_TRXP0
	MDI_TRXP1
	MDI_TRXP2
	MDI_TRXP3
	NVCC_EIM0
	PCIE_RXM
	PCIE_RXP
	PCIE_TXM
	PCIE_TXP
	POR_B
	PWM1_OUT
	PWM2_OUT
	PWM3_OUT
	PWM4_OUT
	SATA_RXN
	SATA_RXP
	SATA_TXN
	SATA_TXP
	SD2_CD_B
	SD2_CLK
	SD2_CMD
	SD2_DATA0
	SD2_DATA1
	SD2_DATA2
	SD2_DATA3
	SD3_CLK
	SD3_CMD
	SPDIF_OUT
	UART1_RX_DATA
	UART1_TX_DATA
	USB_HOST_DN
	USB_HOST_DP
	USB_H1_OC
	USB_H1_PWR_EN
	USB_H1_VBUS
	USB_OTG_DN
	USB_OTG_DP
	USB_OTG_ID
	USB_OTG_OC
	USB_OTG_PWR_EN
	USB_OTG_VBUS
	VIN_5V0
	LVDS1_CLK_NEG
	LVDS1_CLK_POS
	LVDS1_TX0_NEG
	LVDS1_TX0_POS
	LVDS1_TX1_NEG
	LVDS1_TX1_POS
	LVDS1_TX2_NEG
	LVDS1_TX2_POS
	MIC_IN
	N16774509
	N16787605
	N16787608
	N16787611
	N16787614
	N16802700
	N16873113
	N16873407
	N16873430
	N16911937
	N16928431
	N16928461
	N16929755
	PCIE_CREFCLKM
	PCIE_CREFCLKP
	PCIE_CRXM
	PCIE_CRXP
	PCIE_CTXM
	PCIE_CTXP
	STERO_OUT_L
	STERO_OUT_R
	TP35
	V_1P5
	CCM_CLKO2
	I2C1_SCL
	I2C1_SDA
	N16930564
	N16930567
	N16930582
	N16930589
	N17129923
	AUD5_RXD
	AUD5_TXC
	AUD5_TXD
	AUD5_TXFS
	HDMI_TX_CEC_LINE
	I2C3_SCL
	I2C3_SDA
	LVDS0_TX3_N
	LVDS0_TX3_P
	RXD0
	SD2_VSELECT
	TXD0
	USB_OTG_CHD_B
	__NC__SPDIF_CLK_IN
	N16796046
	N16796048
	N16913511
	PWM1_OUT_AFTER_RES
	USB_HUB_DN1
	USB_HUB_DN2
	USB_HUB_DP1
	USB_HUB_DP2
	N17211057
	N17211064
	USB_HUB_DN3
	USB_HUB_DP3
	N17217200
	USB_HUB_DN4
	USB_HUB_DP4
	MSATA_DISABLE
	N17239652
	NVCC_SD2
	PCIE_UIM_DATA
	PCIE_UIM_PWR
	PCIE_UIM_RST
	PCIE_UIM_VPP
	PCI3_UIM_CLK
	VCC_1P8
	V_SD
	N17129929
	N17130772
	N17131048
	N17131055
	N17330632
	N17330651
	N17330663
	N17331929
	N17332864
	N17332922
	N17332949
	N17358102
	N173328760
	N173329440
	V_3V2_FLTR
	N17411045
	N17411085

Please open the schematic and run the packager to ensure these nets are added to the CES database,
then run Forward Annotation.