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Expedition PCB - Pinnacle - Version 2009.0.369.456
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Job Directory:        D:\Job\SolidRun\ARMighty\PCB\

Design Status Report: D:\Job\SolidRun\ARMighty\PCB\LogFiles\DesignStatus_21.txt

Mon Mar 02 12:29:02 2015

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DESIGN STATUS
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Board Size Extents  ............ 9.84 X 3.35 (in)
Route Border Extents  .......... 9.8 X 3.31 (in)
Actual Board Area  ............. 32.94 (in)
Actual Route Area  ............. 32.42 (in)

Placement Areas: Name            Available         Required          Required/Available
                 Entire Board    65.88 Sq. (in)    18.99 Sq. (in)    28.82 %

Pins  .......................... 2148
Pins per Route Area  ........... 66.26 Pins/Sq. (in)

Layers  ........................ 4
    Layer 1 is a signal layer
        Trace Widths  .......... 9
    Layer 2 is a Positive Plane Layer with nets
        GND
        GNDC
        Trace Widths  .......... None.
    Layer 3 is a Positive Plane Layer with nets
        GND
        GNDC
        Trace Widths  .......... None.
    Layer 4 is a signal layer
        Trace Widths  .......... 5

Nets  .......................... 472
Connections  ................... 1390
Open Connections  .............. 1320
Differential Pairs  ............ 0
Percent Routed  ................ 5.04 %

Netline Length  ................ 503.84 (in)
Netline Manhattan Length  ...... 603.66 (in)
Total Trace Length  ............ .22 (in)

Trace Widths Used (th)  ........ 5, 9
Vias  .......................... 26
Via Span  Name                   Quantity
   1-4    019VIA8_SMB            26

Teardrops....................... 0
    Pad Teardrops............... 0
    Trace Teardrops............. 0
    Custom Teardrops............ 0
Breakouts....................... 0

Virtual Pins.................... 0
Guide Pins ..................... 0

Parts Placed  .................. 477
    Parts Mounted on Top  ...... 160
        SMD  ................... 125
        Through  ............... 35
        Test Points  ........... 0
        Mechanical  ............ 0
    Parts Mounted on Bottom  ... 317
        SMD  ................... 315
        Through  ............... 2
        Test Points  ........... 0
        Mechanical  ............ 0
    Embedded Components ........ 0
        Capacitors ............. 0
        Resistors .............. 0
    RF Shapes .................. 0

    Edge Connector Parts  ...... 0

Parts not Placed  .............. 12

Nested Cells  .................. 0

Jumpers  ....................... 0

Through Holes  ................. 324
    Holes per Board Area  ...... 9.84 Holes/Sq. (in)
Mounting Holes  ................ 44

Wirebonds
    Bondpads ................... 0
    Bond Wires ................. 0