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Expedition PCB - Pinnacle - Version 2009.0.369.456
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Job Directory:        D:\Job\forte-innov\FORTE-1\PCB\

Design Status Report: D:\Job\forte-innov\FORTE-1\PCB\LogFiles\DesignStatus_00.txt

Wed Jul 14 11:14:36 2010

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DESIGN STATUS
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Board Size Extents  ............ 81.28 X 66.56 (mm)
Route Border Extents  .......... 85.72 X 81.92 (mm)
Actual Board Area  ............. 5,410 (mm)
Actual Route Area  ............. 7,022.16 (mm)

Placement Areas: Name            Available         Required          Required/Available
                 Entire Board    10,819.99 Sq. (mm)6,675.86 Sq. (mm) 61.70 %

Pins  .......................... 513
Pins per Route Area  ........... .07 Pins/Sq. (mm)

Layers  ........................ 4
    Layer 1 is a signal layer
        Trace Widths  .......... None.
    Layer 2 is a signal layer
        Trace Widths  .......... None.
    Layer 3 is a signal layer
        Trace Widths  .......... None.
    Layer 4 is a signal layer
        Trace Widths  .......... None.

Nets  .......................... 127
Connections  ................... 94
Open Connections  .............. 94
Differential Pairs  ............ 0
Percent Routed  ................ 0.00 %

Netline Length  ................ 2,368.42 (mm)
Netline Manhattan Length  ...... 2,874.12 (mm)
Total Trace Length  ............ 0 (mm)

Trace Widths Used (mm)  ........ None.
Vias  .......................... 0

Teardrops....................... 0
    Pad Teardrops............... 0
    Trace Teardrops............. 0
    Custom Teardrops............ 0
Breakouts....................... 0

Virtual Pins.................... 0
Guide Pins ..................... 0

Parts Placed  .................. 36
    Parts Mounted on Top  ...... 36
        SMD  ................... 6
        Through  ............... 30
        Test Points  ........... 0
        Mechanical  ............ 0
    Parts Mounted on Bottom  ... 0
        SMD  ................... 0
        Through  ............... 0
        Test Points  ........... 0
        Mechanical  ............ 0
    Embedded Components ........ 0
        Capacitors ............. 0
        Resistors .............. 0
    RF Shapes .................. 0

    Edge Connector Parts  ...... 0

Parts not Placed  .............. 152

Nested Cells  .................. 0

Jumpers  ....................... 0

Through Holes  ................. 127
    Holes per Board Area  ...... .02 Holes/Sq. (mm)
Mounting Holes  ................ 4

Wirebonds
    Bondpads ................... 0
    Bond Wires ................. 0